In one conventional data storage arrangement, a computer node includes a host bus adapter (HBA). The HBA includes a protocol engine that communicates with a data storage system via one or more communication links in accordance with at least one communication protocol. In the conventional system, the host system may include software and/or firmware that issues one or more tasks to the HBA. Tasks may include one or more I/O data transfer commands from the host system to the data storage system, via the protocol engine. Also in the conventional system, the protocol engine is implemented, at least in large part, in software and/or firmware, and thus tasks are processed using firmware and/or software.
Processing of tasks in software and/or firmware may require at least one embedded processor to execute the instructions generated by software and/or firmware. When processing tasks using software and/or firmware, the conventional protocol engine requires multiple interrupts, which increases the overall latency of task processing and may require real time monitoring, in software and/or firmware, of the progression of the tasks through the protocol engine. In addition, if the protocol engine has multiple communication channels for processing multiple tasks issued by the host system, having one embedded processor does not allow for independent operation of the communication channels. Therefore, if the embedded processor is busy processing one task for one communication channel, processing of the remainder of tasks on the remainder of communication channels is delayed. Hence, any difficulties encountered on one communication channel adversely affect communication on the remainder of the communication channels.
Alternatively, if the software and/or firmware is embedded in the host system, these tasks may degrade the performance of the host processor and/or chipset. Thus, as protocol speed and complexity increases, software and/or firmware processing of tasks may become too slow for effective data transfer, especially when multiple tasks involving multiple data transfers via multiple communication channels and associated ports may be issued by the host system.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art. Accordingly, it is intended that the claimed subject matter be viewed broadly, and be defined only as set forth in the accompanying claims.